The present invention relates to a method for monitoring photolithographic processing carried out on a semiconductor substrate, and more particularly for inspecting the cross-sectional profile of a feature formed on the semiconductor substrate. The invention has particular applicability for in line inspection of semiconductor wafers during manufacture of high-density semiconductor devices with submicron design features.
Current demands for high density and performance associated with ultra large scale integration require submicron features, increased transistor and circuit speeds and improved reliability. Such demands require formation of device features with high precision and uniformity, which in turn necessitates careful process monitoring, including frequent and detailed inspections of the devices while they are still in the form of semiconductor wafers.
One important process requiring careful inspection is photolithography, wherein masks are used to transfer circuitry patterns to semiconductor wafers. Typically, a series of such masks are employed in a preset sequence. Each photolithographic mask includes an intricate set of geometric patterns corresponding to the circuit components to be integrated onto the wafer. Each mask in the series is used to transfer its corresponding pattern onto a photosensitive layer (i.e., a photoresist layer) which has been previously coated on a layer, such as a polysilicon or metal layer, formed on the silicon wafer. The transfer of the mask pattern onto the photoresist layer is conventionally performed by an optical exposure tool such as a scanner or a stepper, which directs light or other radiation through the mask to expose the photoresist. The photoresist is thereafter developed to form a photoresist mask, and the underlying polysilicon or metal layer is selectively etched in accordance with the mask to form features such as lines or gates.
Fabrication of the mask follows a set of predetermined design rules set by processing and design limitations. These design rules define, e.g., the space tolerance between devices and interconnecting lines and the width of the lines themselves, to ensure that the devices or lines do not overlap or interact with one another in undesirable ways. The design rule limitation is referred to as the critical dimension (xe2x80x9cCDxe2x80x9d), defined as the smallest width of a line or the smallest space between two lines permitted in the fabrication of the device. The CD for most ultra large scale integration applications is on the order of a fraction of a micron.
As design rules shrink and process windows (i.e., the margins for error in processing) become smaller, inspection and measurement of surface features cross-sectional shape (xe2x80x9cprofilexe2x80x9d), as well as CD, is becoming increasingly important. Deviations of a feature""s profile from design dimensions may adversely affect the performance of the finished semiconductor device. Furthermore, the measurement of a feature""s profile is sometimes as important, or more important, than the measurement of its CD, since the profile may indicate processing problems, such as stepper defocusing or photoresist loss due to cover-exposure, not readily revealed by CD information.
For example, FIG. 1A shows an ideal profile 100 (i.e., the profile intended by the designer) of a typical feature on the surface of a semiconductor wafer, and FIG. 1B shows a typical actual profile 100a of the same feature. Although the ideal profile 100 and the actual profile 100a are significantly different, they both have the same CD. As graphically depicted in FIG. 2, a feature""s profile can be more sensitive to photolithographic process parameters, such as stepper focusing and exposure, than the feature""s CD. In other words, as the stepper""s parameters change, a feature""s CD may not change significantly, but its profile may change dramatically.
Because of the extremely small scale of current CD""s, the instrument of choice for measurement and inspection of surface features produced by photolithographic processing is a scanning electron microscope (SEM) known as a xe2x80x9ccritical dimension scanning electron microscopexe2x80x9d (CD-SEM). However, although SEM""s are useful for measuring CD""s, they do not provide an adequately detailed direct image or measurement of feature profiles. Consequently, conventional techniques for inspecting profiles include sectioning the wafer and measuring feature profiles, as with a dual-beam system such as a focused ion beam scanning electron microscope (FIB-SEM). Another profile inspection technique involves the use of an atomic force microscope to examine surface features without destroying the wafer under test. However, these techniques are disadvantageous in that they are inherently time-consuming engineering and analysis tools rather than inspection tools, and must be used xe2x80x9coff-linexe2x80x9d in a yield laboratory. Thus, they do not provide information in xe2x80x9creal timexe2x80x9d, when it would be most useful for monitoring process quality and implementing early solutions to processing problems.
Furthermore, none of the conventional techniques provide information relating to the cause of any profile or CD defects they may uncover. When the measured CD or profile is found to be outside a pre-designated dimensional range, it signifies that something is wrong with the stepper. However, it is not known from the CD or profile measurement whether; e.g., it is the stepper focus or exposure or both that is out of limits. Consequently, further tests must be performed to determine the cause of the problem, adding to the time and cost of inspection.
There exists a need for a simple, cost-effective methodology for in-process inspection of semiconductor wafers to provide information relating to feature CD and profile, as well as information relating to the photolithography process.
An advantage of the present invention is the ability to perform in-process inspection of features on a semiconductor substrate using a standard CD-SEM, providing information relating to the CD and profile characteristics of the features, and identifying process problem areas.
According to the present invention, the foregoing and other advantages are achieved in part by a method of inspecting a target feature on a semiconductor wafer, which method comprises forming a plurality of comparable reference features on a reference semiconductor wafer, the reference features having a profile comparable to a profile of the target feature, each of the reference features respectively associated with a different known profile and stepper setting; obtaining a reference waveform of each of the reference features; selecting one of the reference waveforms as a golden waveform; obtaining a target waveform of the target feature; comparing the target waveform with the golden waveform; identifying the reference waveform which most closely matches the target waveform to obtain the profile of the target feature and a target feature stepper setting; and determining the difference between the stepper setting associated with the golden waveform and the stepper setting associated with the target feature when the golden waveform is not the reference waveform that most closely matches the target waveform.
In another aspect of the present invention, if it is determined that the target waveform does not match the golden waveform, the step of identifying the reference waveform which most closely matches the target waveform comprises obtaining a first derivative of the target and reference waveforms; dividing the first derivative of the target waveform and the derivatives of the reference waveforms into at least two segments; separately comparing corresponding segments of the derivatives of the target waveform and the reference waveforms to identify which segments of the derivatives of the reference waveforms most closely match the corresponding segments of the derivative of the target waveform; and assembling the profiles associated with the matching segments of the derivatives of the reference waveforms to predict the profile of the target feature.
A further aspect of the present invention is a computer-readable medium bearing instructions for inspecting a target feature on a semiconductor wafer, said instructions, when executed, being arranged to cause one or more processors to perform the steps of receiving a waveform corresponding to the target feature; receiving a plurality of reference waveforms corresponding to a plurality of comparable reference features on a reference semiconductor wafer, the reference features having a profile comparable to a profile of the target feature, each of the reference features respectively associated with a different known profile and stepper setting; receiving one of the reference waveforms as a golden waveform; comparing the target waveform and the golden waveform; identifying the reference waveform which most closely matches the target waveform to obtain the profile of the target feature and a target feature stepper setting; and determining the difference between the stepper setting associated with the golden waveform and the stepper setting associated with the target feature when the golden waveform is not the reference waveform that most closely matches the target waveform.
A still further aspect of the present invention is an apparatus for inspecting a target feature on a semiconductor wafer, the apparatus comprising an imager to produce a target waveform corresponding to the target feature; a storage medium that stores the target waveform and a plurality of reference waveforms corresponding to a plurality of comparable reference features on a reference semiconductor wafer, the reference features having a profile comparable to a profile of the target feature, each of the reference features respectively associated with a different known profile and stepper setting; a processor configured to recognize one of the reference waveforms as a golden waveform; and a comparator that compares the target waveform and the golden waveform, and compares the target waveform and the reference waveforms; wherein the processor is further configured to identify the reference waveform which most closely matches the target waveform to obtain the profile of the target feature and a target feature stepper setting, and to determine the difference between the stepper setting associated with the golden waveform and the stepper setting associated with the target feature when the golden waveform is not the reference waveform that most closely matches the target waveform.
Additional advantages of the present invention will become readily apparent to those skilled in this art from the following detailed description, wherein only the preferred embodiment of the present invention is shown and described, simply by way of illustration of the best mode contemplated for carrying out the present invention. As will be realized, the present invention is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, all without departing from the present invention. Accordingly, the drawings and description are to be regarded as illustrative in nature, and not as restrictive.